| File | Version | Explanation | |
| SIS3600 | 1 | 32-bit strobed/coincidence latch | |
| SIS3600 | 2 | based on version 1, no Broadcast functionality, CBLT style readout support | |
| SIS3601 | 1 | 32-bit output register with event counter | |
| SIS3601 | 2 | 32-bit ouput register with event counter and multiplexer | |
| SIS3610 | 1 | 16 In/16 Out-Register with interrupt capability | |
| SIS3610 | 2 | Output polarity inverted (for 50 Ohm TTL drivers) | |
| SIS3800 | 1 | 32 channel 200 MHz 32-bit counter | |
| SIS3800 | 2 | derived from version 1 compatible with 4 in-/4 outputs of 3801 designs |
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| SIS3800 | 3 | derived from version 2 Inhibit during clock shadow |
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| SIS3800 | 5 | derived from version 3, BLT readout bug fix | |
| SIS3801 | 1 | 32 channel 200 MHz 32-bit multiscaler | |
| SIS3801 | 2 | 32 channel 200 MHz 24-bit multiscaler with user bits | |
| SIS3801 | 3 | derived fom version 1 dwell time depending on number of active channels |
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| SIS3801 | 4 | derived fom version 2 dwell time depending on number of active channels |
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| SIS3801 | 5 | derived fom version 3 build in next pulse generator prescaler for next pulse no broadcast features |
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| SIS3801 | 6 | 24-bit/user bit version of 5 | |
| SIS3801 | 7 | derived fom version 5 external LNE inhibit |
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| SIS3801 | 8 | derived fom version 6 external LNE inhibit |
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| SIS3801 | 9 | derived from version 7 28-bit prescale factor |
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| SIS3801 | A | derived from version 8 28-bit prescale factor |
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| SIS3801 | B | derived from version 9, ROAK/RORA interrupter selectable via key address | |
| SIS3801 | C | derived from version A, ROAK/RORA interrupter selectable via key address | |
| SIS3802 | 1 | SIS3802 8 channel 50 MHz prescaler/rate divider | |
| SIS3803 | 1 | 16 channel version of SIS3800 | |
| SIS3803 | 1 | Inline version of SIS3803 | |
| SIS3804 | 1 | 8 channel version of SIS3800 | |
| SIS3805 | 1 | 32 channel 200 MHz 48-bit multiscaler two bank style |
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| SIS3805 | 2 | 32 channel 200 MHz 48-bit multiscaler latch shadow style |
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| SIS3806 | 1 | 8 channel version of SIS3801/1 | |
| SIS3806 | 2 | 8 channel version of SIS3801/2 | |
| SIS3806 | 5 | 8 channel version of SIS3801/5 | |
| SIS3806 | 6 | 8 channel version of SIS3801/6 | |
| SIS3806 | 7 | Latching version of SIS3806 with CBLT | |
| SIS3806 | 9 | User bit latching version of SIS3806/5 | |
| SIS3806 | A | User bit latching version of SIS3806/6 | |
| SIS3807 | 1 | 4 channel pulse generator | |
| SIS3807 | 2 | 4 channel pulse generator with two output levels | |
| SIS3807 | 3 | 1 channel pulse generator with programmable number of pulses and pulse width | |
| SIS3807 | 4 | V3 with pulse width register extended from 8 to 16-bit | |
| SIS3808 | 1 | deadtimed version of SIS3801 | |
| SIS3808 | 2 | 8 deadtime steps (instead of 4), increased imnimum step width (960 instead of 120 ns) | |
| SIS3809 | 1 | 4 channel interrupter/FLIPFLOP | |
| SIS3809 | 2 | as 3809, outputs settable from VME | |
| SIS3810 | 1 | 16 channel puls length counter | |
| SIS3811 | 7 | 32 channel 200 MHz 32-bit multiscaler, CBLT style readout, not all SIS3801 functions available | |
| SIS3811 | 8 | 32 channel 200 MHz 24-bit multiscaler, CBLT style readout, not all SIS3801 functions available |
Last Update 14.10.09 by Matthias Kirsch