SIS8300-L2 Firmware and MMC revision page
SIS8300-L2 Generic Firmware Revision Table
| Design Name |
Major Revision # |
Minor Revision # |
Description |
MCS File |
| SIS8302 |
10 |
0E |
for use w. SIS8900 |
V100E |
| SIS8302 |
20 |
0E |
for use w. DWC |
V200E |
| SIS8302 |
10 |
0F |
For use w. SIS8900, PCIe core reset after PME_turn_off added |
V100F |
| SIS8302 |
20 |
0F |
For use w. DWC, PCIe core reset after PME_turn_off added |
V200F |
| SIS8302 |
10 |
10 |
Firmware Upgrade over PCIe added |
V1010 |
| SIS8302 |
20 |
10 |
Firmware Upgrade over PCIe added |
V2010 |
| SIS8302 |
10 |
12 |
Current for use w. SIS8900, modified external (harlink/MLVS Inputs) trigger synchronisation with adc1_clk, 4-DW transmit 32-bit word swap in the 64-bit word with 64-bit address Kernelmemory bug fix, modified PCIe interrupter |
V1012 |
| SIS8302 |
20 |
12 |
Current for use w. DWC, modified external (harlink/MLVS Inputs) trigger synchronisation with adc1_clk, 4-DW transmit 32-bit word swap in the 64-bit word with 64-bit address Kernelmemory bug fix, modified PCIe interrupter |
V2012 |
| SIS8300-L2 Firmware Revision Table |
SIS8300-L2 MMC Most Recent Revision Table
| Revision/File |
Comment |
| SIS8300L2_108.hpm |
Pin configuration fix Z3_TCLK_EN_H and Z3_TCLK_SEL. |
| SIS8300L2_109.hpm |
Modification to handle serial numbers above 999. |
| SIS8300L2_124.hpm |
Merge serial number length detection from branch. Interoperability fixes. |
| SIS8300L2_125.hpm |
RTM Z3_LVDS Voltage corrected to 2V5 (required for proper operation with DS8VM1. Was changed from 2V5 to 3V3 in revision 98 as a workaround for a fixed earlier DWC8300 R11/DRTM-DWC10 issue). RTM fix and use of 2.5V recommended. |
| SIS8300L2_126.hpm |
TCLK enable interlock removed for activation of TCLK regardless of the Z3 class. |
| SIS8300L2_240.hpm |
Fix for too low RTM User I2C bus DAC voltage. |
| SIS8300-L2 Most Recent MMC Revision Table |
Note: The DESY Module Management Controller (MMC) software is licensed to Struck
Innovative Systeme GmbH under DESY LV92.
