SIS3305 Firmware Page

SIS3305 Generic Firmware Revision Table
Design Name Major Revision # Minor Revision # Description ZIP File with MCS Files
SIS3305 0x1008 10 08 obsolete
SIS3305 0x1009 10 09 Gate mode pileup modification
SIS3305 0x100A 10 0A Key dummy TDC event, clock sync. status reg. sis3305v100A.zip
SIS3305 0x100B 10 0B 1 GByte memory support, SST320 bug fix sis3305v100B.zip
SIS3305 0x200B 20 0B 2 GByte memory support V2 hardware, SST320 bug fix sis3305v200B.zip
SIS3305 0x100C 10 0C 1 GB, TDC measurement capability for direct mode added sis3305v100C.zip
SIS3305 0x200C 20 0C 2 GB, TDC measurement capability for direct mode added, V2 hardware sis3305v200C.zip
SIS3305 0x100D 10 0D TDC event bug fix for ADC clocks below 1.5 GHz sis3305v100D.zip
SIS3305 0x200D 20 0D TDC event bug fix for ADC clocks below 1.5 GHz, V2 hardware sis3305v200D.zip
SIS3305 Generic Firmware Revision Table

Note on 0x10xy and 0x20xy versions

Boards up to serial number 36 are V1 hardware and require 0x10xy firmware, while boards starting at serial number 37 are V2 hardware and require 0x20xy firmware.

JTAG firmware upgrade procedure

The firmware of the SIS3305 can be ugraded with a XILINX JTAG USB programmer from a Windows PC (XILINX part number HW-USB-II-G-JTAG, Struck part number 02950). Firmware upgrade over VME is supported also.