SIS4100 Next Generation Fastbus (NGF) to VME interface

FASTBUS as good as it can get

Status: 3 units with 2 VME slots available

The SIS4100 is a VME to FASTBUS interface, which is based on recent developments in the FPGA sector and the experience of earlier masters. While earlier interfaces along these lines focus on the readout of sparsifying frontend electronics the NGF is designed in a fashion, which allows for on the fly data reduction (on the fly pedestal subtraction e.g.) by the Fastbus masters on board circuitry.

Find below the (clickable for details) side view of a NGF with two SHARC piggies installed.

Key functionality of the SIS4100

FASTBUS list sequencer

sequencer RAM and FIFO

pedestal subtraction unit with pedestal and remap memory

one or two optional higher level trigger/filter SHARC DSP(s)

4 ECL in/4 ECL outputs

4 NIM/LEMO in/ 4 NIM LEMO outputs

4 TTL outputs · 1 NIM reset input

16 LEDs

VME card cage (3 VME slots NGF-3, 2 VME slots NGF-2)

Two mezzanine sites for higher level trigger/filtering computing and software decision based list execution are part of the concept. They can hold a SIS9200 SHARC piggy pack, higher level inter crate trigger information can be exchanged via the SHARC link ports.

SHARC Piggy properties

PDF Placement plan of mainboard ( 250 KB)

VME auto daisy chain backplane

request user manual.

Find below a simplified block diagram of the module.

Find below a flow chart of the on the fly pedestal subtraction mechanism.

Accessory: