The SIS3801 is one of the multiscaler implementations on the base of the SIS38xx/360x base board. It combines high packing density with a fast counting rate and an adapted channel depth. Deadtimeless readout can be implemented by making use of the units two counter banks. The multiscaler is designed for experiments with the need to measure counting rates with fixed or variable time intervals. The counter data are stored in a synchronous FIFO, thus readout can take place in parallel to the acquisition of new data. The scaler is a single width 6U VME card, no non standard voltages are required. The unit comes with a 20 pin header connector for the control section and two 34 pin headers for the counters (ECL and flat cable TTL version) or via 8 LEMO connectors for the control section and 32 LEMOs for the counter section (NIM and LEMO TTL version). RS422/RS485 is available as input option. Photograph of the flat cable/LEMO version.
Mixed LEMO control/flat cable counter input version available (looks like SIS3800 mixed Version).
32 channels |
Minimum dwell time 400ns-4µs (1-32 active channels) |
24/32-bit channel depth |
External/VME time slice advance |
200 MHz |
VME interrupt capabilities |
2 scaler banks |
VME64x side shielding |
64/256 (optional) K FIFO size |
A16/A24/A32 D16/D32/BLT32 |
VME access/user LED |
VME64x connectors |
2 front panel user bits (in 24-bit mode) |
Broadcast features |
copy in progress ouput |
Single +5 V supply |
Prescaler for external next pulse |
Internal pulser for next pulse |
Broadcast features not available |
The firmware designs 7 and 8 are based upon the designs 5 and 6, the additional feature which was introduced is the possibility to inhibit the next pulse via an external front panel signal. This allows the user to save an external coincidence module which was needed for the implementation of this functionality so far.
EPICS support by Mark Rivers http://cars9.uchicago.edu/software/dev_mca_struck.html.